1. Field of the Invention
This invention relates to digital-to-analog (D/A) converters. More particularly, this invention relates to D/A converters using complementary-driven CMOS switches to produce a voltage-mode output signal.
2. Description of the Prior Art
Referring to FIG. 1, the basic voltage-mode (or voltage-switching) CMOS D/A converter includes a thin-film R/2R ladder network 20 and pairs of n-channel MOS switches generally indicated at 22. Each complementary-driven switch pair consists of a V.sub.ref (reference voltage) switch and an A.sub.gnd (analog ground) switch, the "ON" switch being determined by the corresponding input code bit to the converter. The ladder network termination is connected to A.sub.gnd via a permanently "ON" A.sub.gnd switch.
Because of the nature of the R/2R ladder network and the fact that switch "ON" resistance (R.sub.ON) is finite (i.e. r&gt;0), the R.sub.ON 's conventionally are binarily weighted. This is done by weighting the device geometries, of both the V.sub.ref and A.sub.gnd switches, in a binary fashion. Also, it is important that switch pair "ON" resistances match as closely as possible, i.e. ideally: EQU R.sub.ONV.sbsb.ref =R.sub.ONA.sbsb.gnd,
for a given switch pair.
Referring now to FIG. 2, there is shown a known switch pair arrangement 22A, 22B sometimes employed when a conventional current-mode D/A converter is used in the voltage mode. Important characteristics of this configuration are:
(a) (W/L).sub.V =(W/L).sub.A =(W/L). The V.sub.ref and A.sub.gnd switches are the same size. (Subscript V identifies the V.sub.ref switch, the subscript A identifies the A.sub.gnd switch.)
(b) Both devices occupy the same p-well, which is connected to A.sub.gnd.
(c) Both devices have "ON" gate voltages of V.sub.DD.
Assuming non-saturated device operation, expressions for the "ON" resistances of the switches can be developed from the basic current equation: EQU I.sub.DS =.beta.'n(W/L)[(V.sub.GS -V.sub.T)V.sub.DS -1/2V.sub.DS.sup.2 ],
Where
.beta.'n=C.sub.ox .mu.=(k.sub.ox .epsilon..sub.o .mu./t.sub.ox), PA1 .mu.=Effective channel mobility, PA1 V.sub.T =threshold voltage, PA1 W=effective channel width and PA1 L=effective channel length
(i) This relationship can be developed for the V.sub.ref Switch as follows: ##EQU1##
(ii) A corresponding relationship can be developed for the A.sub.gnd Switch as follows: ##EQU2##
At the drain of each device, the threshold voltage is given by: ##EQU3##
From the above expressions, it is apparent that in the known switch configuration of FIG. 2 there exists an inherent switch R.sub.ON mismatch (i.e. R.sub.ON.sbsb.V &gt;R.sub.ON.sbsb.A) due to discrepancies between the V.sub.GS, V.sub.T and V.sub.DS values of the V.sub.ref A.sub.gnd devices. The fact that this R.sub.ON mismatch worsens as V.sub.ref increases, results in a restricted reference voltage range for the converter.
On the other hand, the FIG. 2 arrangement has the advantages of: (i) Relatively small die area, since all the switches can be contained within one p-well connected to A.sub.gnd, and (ii) ease of adaptability to current-mode operation since the configuration is originally designed for use in that mode.
FIG. 3 shows another known switch pair configuration directed to achieving R.sub.ON matching in a D/A converter designed specifically for use in the voltage mode. This switch pair arrangement 22C, 22D has the following important features:
(a) (W/L).sub.V &gt;(W/L).sub.A. This (W/L) mismatch is deliberately introduced.
(b) The V.sub.ref and A.sub.gnd devices occupy separate p-wells.
(c) Both devices have "ON" gate voltages of V.sub.DD.
In this case, the "ON" resistances expressions are: ##EQU4##
Because the V.sub.ref devices have individual p-wells, their threshold voltages are now lower than the corresponding threshold voltages in FIG. 2 (due to reduced body effect) and they match their A.sub.gnd counterparts more closely.
Equating R.sub.ON 's shows that a (W/L) mismatch can be deliberately introduced to give a first order compensation for the inherent switch V.sub.GS mismatch, at a given value of V.sub.ref : ##EQU5##
The advantage of this arrangement over that of FIG. 2 is an increase in the upper limit of the value of the reference voltage which can be employed. Disadvantages include: (i) A relatively large die area, since each V.sub.ref switch requires its own separate p-well; and (ii) a reference voltage range restricted to values close to the particular value of V.sub.ref which satisfies the above equation.